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1 for more information www.linear.com/lt3922 typical a pplica t ion fea t ures descrip t ion 36v, 2a synchronous step-up led driver the lt ? 3922 is a monolithic, synchronous, step-up dc/ dc converter that utilizes fixed-frequency, peak current control and provides pwm dimming for a string of leds . the led current is programmed by an analog voltage or the duty cycle of pulses at the ctrl pin. the lt3922 will maintain 2% current regulation through an external sense resistor over a wide range of output voltages. the switching frequency is programmable from 200khz to 2 mhz by an external resistor at the rt pin or by an external clock applied at the sync/sprd pin. with the optional spread spectrum frequency modulation enabled, the frequency varies from 100% to 125% to reduce emi. the lt3922 also includes a driver for an external high- side pfet for pwm dimming and an internal pwm signal generator for analog control of pwm dimming when an external signal is not available. additional features include an accurate external reference voltage for use with the ctrl and pwm pins , an led current monitor, an accurate en/uvlo pin threshold, open-drain fault reporting for open-circuit and short-circuit load conditions, and thermal shutdown. 2mhz, 93% efficient 10w (30v, 333ma) boost led driver efficiency vs v in a pplica t ions n 2% led current regulation n 2% output voltage regulation n 5000:1 pwm dimming at 100hz n 128:1 internal pwm dimming n spread-spectrum frequency modulation n silent switcher ? architecture for low emi n operates in boost, buck mode and buck-boost mode n 2.8v to 36v input voltage range n up to 34v led string voltage n 2a, 40v internal switches n 200khz to 2mhz with sync function n analog or duty cycle led current control n open/short led protection and fault indication n thermally enhanced 28-pin (4mm 5mm) qfn n automotive and industrial lighting n machine vision l, lt , lt c , lt m , linear technology, the linear logo and silent switcher are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 7199560, 7321203, and other patents pending. v in v in 8v to 27v 365k 59.0k 100k en/uvlo ovlo v ref ctrl analog dim pwm dim pwm sync/sprd intv cc fault bstsw v out v out fb rp v c rt isp gnd gnd isn pwmtg ismon 3922 ta01a lt3922 1m 1m 33.2k 100k 10k 1nf 1f 0.1f l1 4.7h m1 300m 4.7f 0.47f 0.47f 30v 333ma led ss 45.3k 2mhz 2.2f 10nf 4.7f lt 3922 3922f 18 21 24 27 30 70 75 80 85 90 v led = 30v 95 100 efficiency (%) 3922 ta01b f sw = 2mhz 100% pwm duty cycle v in (v) 6 9 12 15
2 for more information www.linear.com/lt3922 p in c on f igura t ion a bsolu t e maxi m u m r a t ings v in and en / uvlo ...................................................... 40 v i sp , isn , and v out .................................................... 40 v is p C isn ................................................................. 0. 3 v ctrl and fb ............................................................ 3. 3 v ovlo , pwm , sync / sprd , and fa u lt ........................ 6 v ss and v c ................................................................ 3.3 v s w ............................................................................ 40 v bst ........................................................................... 43 v bs t C sw ................................................................... 3v int v cc , v ref , ismon , pwmtg , rt, and rp ...... ( no te 2) operating junction temperature range ( notes 3, 4) lt 39 22e/ lt 39 22i .................................. C 40 to 125 c lt 39 22h ................................................ C 40 to 150 c storage temperature range ...................... C 60 to 150 c (note 1) 9 10 top view ufd package 28-lead (4mm 5mm) plastic qfn 11 12 13 28 27 26 25 29 gnd 24 14 23 6 5 4 3 2 1 sw bst intv cc v in en/uvlo ovlo v ref ctrl gnd v out pwmtg pwm rp sync/sprd rt fault sw sw nc nc v out gnd isp isn v c fb ss ismon 7 17 18 19 20 21 22 16 8 15 ja = 34c/w exposed pad (pin 29) is gnd, must be soldered to pcb e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c, v in = 12v, v en/uvlo = 2v unless otherwise noted. lead free finish tape and reel part marking* package description temperature range lt3922eufd#pbf lt3922eufd#trpbf 3922 28-lead (4mm 5mm) plastic qfn C40c to 125c lt3922iufd#pbf lt3922iufd#trpbf 3922 28-lead (4mm 5mm) plastic qfn C40c to 125c lt3922hufd#pbf lt3922hufd#trpbf 3922 28-lead (4mm 5mm) plastic qfn C40c to 150c consult ltc marketing for parts specified with wider operating temperature ranges . * the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. some packages are available in 500 unit reels through designated sales channels with #trmpbf suffix. parameter conditions min typ max units input voltage range 2.8 36 v v in pin quiescent current v en/uvlo = 1.5v, not switching v en/uvlo = 0.1v, shutdown 2.9 4 1 ma a en /uvlo threshold (falling) 1.260 1.330 1.400 v en/uvlo rising hysteresis 25 mv en/uvlo pin current v en/uvlo = 1.2v 2 a input ovlo threshold (rising) 1.145 1.205 1.265 v input ovlo falling hysteresis 50 mv ovlo pin current v ovlo = 1.0v C100 100 na o r d er i n f or m a t ion http://www .linear.com/product/lt3922#orderinfo lt 3922 3922f
3 for more information www.linear.com/lt3922 e lec t rical c harac t eris t ics parameter conditions min typ max units reference v ref voltage i vref = 0a i vref = 500a l 1.97 1.985 2 2 2.03 2.015 v v v ref pin current limit v ref = 0v, current out of pin 3.2 ma led current regulation ctrl-off threshold (falling) l 200 210 220 mv ctrl-off rising hysteresis 15 mv ctrl pin current v ctrl = 2v ?100 100 na sense voltage (v isp ?v isn ) (analog input) v ctrl = 2v (100%), v isp = 24v v ctrl = 0.75v (50%), v isp = 24v v ctrl = 0.3v (5%), v isp = 24v l l l 98 48.5 4 100 50 5 102 51.5 6 mv mv mv isp pin current v isp = 24.1v, v isn = 24v, v ctrl = 2v 75 a isn pin current v isp = 24.1v, v isn = 24v , v ctrl = 2v 75 a current error amplifier transconductance v isp = 24v 140 a/v duty cycle control of led current sense voltage (v isp ?v isn ) (duty cycle input) ctrl duty = 75% (100%), v isp = 24v ctrl duty = 37.5% (50%), v isp = 24v ctrl duty = 15% (5%), v isp = 24v 99 49 4 100 50 5 101 51 6 mv mv mv ctrl pulse input high (v ih ) 1.6 v ctrl pulse input low (v il ) 0.4 v ctrl pulse input frequency range 10 200 khz voltage regulation fb regulation voltage v ctrl = 2v l 1.175 1.200 1.225 v fb pin current fb in regulation ?100 100 na voltage error amplifier transconductance 1000 a/v intv cc regulator intv cc voltage 2.7 3 3.3 v intv cc pin current limit v intvcc = 0v, current out of pin 20 ma power stage peak current limit 2.0 2.3 2.6 a bottom switch minimum off-time l 15 25 35 ns bottom switch on-resistance 140 m top switch on-resistance 155 m oscillator programmed switching frequency (f sw ) r t = 45.3k, v sync/sprd = 0v r t = 499k, v sync/sprd = 0v l l 1880 175 2000 210 2120 245 khz khz spread spectrum frequency range r t = 45.3k, v sync/sprd = 3v r t = 499k, v sync/sprd = 3v 1880 175 2650 306 khz khz rt pin current limit v rt = 0v, current out of pin 75 a sync/sprd threshold (rising) 1.4 1.5 v sync/sprd falling hysteresis 0.2 v sync/sprd pin current v sync/sprd = 5v ?100 100 na the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c, v in = 12v, v en/uvlo = 2v unless otherwise noted. lt 3922 3922f
4 for more information www.linear.com/lt3922 note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: do not apply a positive or negative voltage source to these pins, otherwise permanent damage may occur. note 3: the lt3922e is guaranteed to meet performance specifications from 0c to 125c junction temperature. specifications over the ?40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the lt3922i is guaranteed to meet performance specifications over the ?40c to 125c operating junction temperature range. the lt3922h is guaranteed over the ?40c to 150c operating junction temperature range. operating lifetime is derated at junction temperatures greater than 125c. note 4: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. the maximum rated junction temperature will be exceeded when this protection is active. continuous operation above the specified absolute maximum operating junction temperature may impair device reliability or permanently damage the device. e lec t rical c harac t eris t ics parameter conditions min typ max units soft-start ss pin charging current v ss = 1v 20 a ss pin discharging current v ss = 2v 2 a ss lower threshold 0.2 v ss higher threshold 1.7 v fault detection open-circuit threshold (fb rising) v isp = v isn = 20v l 1.117 1.140 1.163 v open-circuit falling hysteresis 50 mv led short-circuit threshold (v isp ? v isn ) v isp = 20v 150 mv fault pull-down current v fault = 0.2v, v fb = 1.25v 0.8 ma fault leakage current v fault = 3v, v fb = 0.7v ?100 100 na overvoltage protection fb overvoltage threshold (rising) l 1.240 1.266 1.292 v fb overvoltage falling hysteresis 22 mv led current monitor ismon voltage v isp ? v isn = 100mv (100%), v isp = 24v v isp ? v isn = 10mv (10%), v isp = 24v l l 0.980 80 1.000 100 1.020 120 v mv p wm driver p wmtg gate drive (v out C v pwmtg ) v out = 20v, v pwm = 1.5v 9 10 11 v pwm threshold (rising) 1.4 v pwm falling hysteresis 0.2 v pwm pin current v pwm = 2v ?100 100 na pwm to pwmtg propagation delay turn-on turn-off c pwmtg = 2.1nf (connected from v out to pwmtg) v out = 20v 110 140 ns ns internal p wm dimming p wm voltage for 100% pwm dimming r p = 28.7k, v ref = 2v 2.00 v pwm voltage for 0% pwm dimming r p = 28.7k, v ref = 2v 0.99 v pwm dimming accuracy r p = 28.7k, v ref = 2v, v pwm = 1.1v r p = 28.7k, v ref = 2v, v pwm = 1.9v 7.5 89 10.5 92 13.5 95 % % pwm dimming frequency r p = 28.7k, r t = 45.3k, v sync/sprd = 0v r p = 332k, r t = 45.3k, v sync/sprd = 0v 7.34 115 7.81 122 8.28 129 khz hz rp pin current limit v rp = 0v, current out of pin 65 a the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c, v in = 12v, v en/uvlo = 2v unless otherwise noted. lt 3922 3922f
5 for more information www.linear.com/lt3922 typical p er f or m ance c harac t eris t ics v in shutdown current v in quiescent current intv cc voltage intv cc load regulation v ref voltage v ref load regulation en/uvlo thresholds en/uvlo pin current ovlo threshold v in = 12v, t a = 25c, unless otherwise noted. lt 3922 3922f 55 1.99 2.00 2.01 2.02 v ref voltage (v) 3922 g08 temperature (c) ?50 ?25 0 80 25 50 75 100 125 150 2.5 2.6 2.7 2.8 105 2.9 3.0 3.1 3.2 intv cc voltage (v) 3922 g06 v in = 36v v in = 12v v in = 2.7v v ref load current (a) 130 0 200 400 600 800 1000 1.97 1.98 1.99 2.00 155 2.01 2.02 v ref voltage (v) 3922 g09 ?40c 25c 125c 150c rising falling 0 temperature (c) ?45 ?20 5 30 55 80 105 130 155 0.50 1.20 1.25 1.30 1.35 1.40 1.45 1.50 en/uvlo threshold (v) 3922 g01 rising 1.00 falling temperature (c) ?45 ?20 5 30 55 80 105 130 1.50 155 1.05 1.10 1.15 1.20 1.25 1.30 1.35 ovlo threshold (v) 3922 g03 2.00 v in = 36v 2.50 v in shutdown current (a) 3922 g04 ?40c 25c 125c 150c intv cc load current (ma) 0 2 v in = 12v 4 6 8 10 12 2.80 2.85 2.90 2.95 3.00 v in = 2.7v 3.05 3.10 intv cc voltage (v) 3922 g07 v en/uvlo = 1.2v temperature (c) ?45 ?20 5 30 temperature (c) 55 80 105 130 155 0 0.50 1.00 1.50 2.00 ?45 2.50 3.00 en/uvlo pin current (a) 3922 g02 temperature (c) ?45 ?20 5 30 55 ?20 80 105 130 155 2.00 2.20 2.40 2.60 2.80 3.00 5 3.20 3.40 3.60 v in quiescent current (ma) 3922 g05 v in = 36v v in = 12v v in = 2.7v temperature (c) ?50 30 ?25 0 25 50 75 100 125 150 1.97 1.98
6 for more information www.linear.com/lt3922 typical p er f or m ance c harac t eris t ics rt and rp pin current limits ss currents ss threshold voltages switching frequency internal pwm frequency internal pwm duty cycle v ref line regulation intv cc and v ref uvlo falling thresholds minimum off time v in = 12v, t a = 25c, unless otherwise noted. lt 3922 3922f 21 3.0 threshold voltage (v) 3922 g11 pull-up current pull-down current temperature (c) ?45 ?20 5 30 24 55 80 105 130 155 0 5 10 15 20 27 25 current (a) 3922 g14 r t = 45.3k r p = 28.7k r p = 332k temperature (c) ?45 ?20 5 30 30 55 80 105 130 155 6400 6784 7168 7552 33 7936 8320 110 116 122 128 134 140 internal pwm frequency (hz) 3922 g17 36 temperature (c) ?45 ?20 5 30 55 80 105 130 155 1.990 0 5 10 15 20 25 30 minimum off time (ns) 3922 g12 ss high 1.992 ss low temperature (c) ?45 ?20 5 30 55 80 105 130 1.994 155 0 0.4 0.8 1.2 1.6 2.0 threshold voltage (v) 3922 g15 r t = 45.3k 1.996 r p = 332k temperature (c) ?45 ?20 5 30 55 80 105 130 v in voltage (v) 1.998 155 10.0 10.1 10.2 10.3 10.4 10.5 internal pwm duty cycle (%) 3922 g18 v ref 2.000 pwm lt3922 18.2k 1% 22.1k 1% 2.002 2.004 2.006 2.008 2.010 voltage (v) 3922 g10 rt pin 0 rp pin temperature (c) ?45 ?20 5 30 55 80 105 130 3 155 55 60 65 70 75 80 maximum pin current (a) 3922 g13 r t = 45.3k 6 r t = 499k temperature (c) ?45 ?20 5 30 55 80 105 130 9 155 1400 1500 1600 1700 1800 1900 2000 2100 2200 12 180 190 200 210 220 230 240 250 260 switching frequency (khz) 15 3922 g16 intv cc uvlo v ref uvlo temperature (c) ?45 ?20 5 30 55 80 18 105 130 155 0.9 1.2 1.5 1.8 2.1 2.4 2.7
7 for more information www.linear.com/lt3922 typical p er f or m ance c harac t eris t ics 100% current regulation 5% current regulation ismon voltage peak sw current limit i led vs v in i led vs v out v isp C v isn vs v ctrl v isp C v isn vs d ctrl v isp C v isn vs v fb v in = 12v, t a = 25c, unless otherwise noted. lt 3922 3922f 1.75 50 75 100 125 v isp ? v isn (mv) 3922 g21 ?40c 25c 125c v isp ? v isn (mv) 2 0 20 40 60 80 100 0 200 400 600 0 800 1000 ismon (mv) 3922 g24 f sw = 2mhz v in = 8v r sns = 0.3 r fb_top = 1m r fb_bot = 34.8k v fb overvoltage protection limited 25 v out (v) 9 15 21 27 33 39 50 100 150 50 200 250 300 350 400 i led (ma) 3922 g27 n = 355 v ctrl = 2v v isp = 24v 75 150c 25c ?40c isp?isn voltage (mv) 98.6 99.3 100 100.7 101.4 0 100 50 100 150 200 250 300 350 number of units 3922 g22 n = 355 125 v ctrl = 0.3v v isp = 24v 150c 25c ?40c isp?isn voltage (mv) 4.2 4.6 5 5.4 v isp ? v isn (mv) 5.8 0 40 80 120 160 200 number of units 3922 g23 3922 g19 v ctrl (v) f sw = 2mhz l = 4.7h 12 leds (v out ~ 36v) 6 leds (v out ~ 18v) duty cycle (%) 10 20 30 40 50 0 60 70 80 90 100 1.8 1.9 2.0 2.1 2.2 0.25 2.3 2.4 2.5 2.6 peak sw current (a) 3922 g25 pulse frequency at ctrl pin = 20khz d ctrl (%) 0 12.5 0.50 25 37.5 50 62.5 75 87.5 100 0 25 50 0.75 75 100 125 v isp ? v isn (mv) 3922 g20 f sw = 2mhz r sns = 0.3 11 leds (v out ~33v) peak sw current limited v in (v) 1 0 3 6 9 12 15 18 21 24 27 1.25 30 50 100 150 200 250 300 350 400 i led (ma) 1.50 3922 g26 v fb (v) 1.17 1.18 1.19 1.20 1.21 1.22 0 25
8 for more information www.linear.com/lt3922 typical p er f or m ance c harac t eris t ics efficiency vs v in efficiency vs i led regulated fb voltage pwmtg on voltage pwm driver propagation delay fb ovlo threshold fb openled threshold v isp C v isn shortled threshold power switch on-resistance v in = 12v, t a = 25c, unless otherwise noted. lt 3922 3922f 80 600 800 1000 80 82 84 86 88 90 92 105 94 96 98 100 efficiency (%) 3922 g32 c pwmtg = 2.2nf (c0g type) turn off 130 turn on temperature (c) ?45 ?20 5 30 55 80 105 130 155 155 40 80 120 160 200 propagation delay (ns) 3922 g35 top switch bottom switch 0.90 temperature (c) ?45 ?20 5 30 55 80 105 130 155 0.95 0 50 100 150 200 250 300 350 power switch on?resistance (m) 3922 g30 1.00 temperature (c) ?45 ?20 5 30 55 80 105 130 155 1.05 1.18 1.19 1.20 1.21 1.22 1.23 fb voltage (v) 3922 g33 rising falling 1.10 temperature (c) ?45 ?20 5 30 55 80 105 130 155 1.15 1.18 1.21 1.24 1.27 1.30 1.33 fb ovlo threshold voltage (v) 3922 g36 rising 1.20 fb openled threshold (v) 3922 g28 i led = 400ma 11 leds (v out ~ 33v) f sw = 400khz f sw = 2mhz v in (v) 6 8 falling 10 12 14 16 18 20 22 24 26 28 temperature (c) 30 80 82 84 86 88 90 92 94 96 ?45 98 100 efficiency (%) 3922 g31 temperature (c) ?45 ?20 5 30 55 ?20 80 105 130 155 7 8 9 10 11 12 5 v out ? v pwmtg (v) 3922 g34 temperature (c) ?45 ?20 5 30 55 80 105 30 130 155 120 130 140 150 160 170 180 v isp ? v isn shortled threshold (mv) 55 3922 g29 v in = 12v f sw = 2mhz 6 led (v out ~ 18v) 9 led (v out ~ 27v) 12 led (v out ~ 36v) i led (ma) 0 200 400
9 for more information www.linear.com/lt3922 typical p er f or m ance c harac t eris t ics internal pwm duty cycle (90%) input voltage transient response input voltage transient response turn on and off performance start-up with 10% internal pwm start-up with 50% internal pwm c/10 threshold case temperature rise internal pwm duty cycle (10%) v in = 12v, t a = 25c, unless otherwise noted. lt 3922 3922f 130 i led 100ma/div v in 5v/div 3922 g41 front page application 18v to 6.5v input voltage transient i led = 333ma 5ms/div i led 155 100ma/div v in 5v/div 3922 g42 v led = 30v front page application i led = 333ma 500s/div i led 100ma/div 6 v in 10v/div 3922 g43 v led = 30v front page application with pwm = 1.1v i led = 333ma 5ms/div i led 100ma/div v in 8 10v/div v out 10v/div 3922 g44 v led = 30v front page application with pwm = 1.5v i led = 333ma 5ms/div i led 100ma/div 10 v in 10v/div v out 10v/div 3922 g45 v led = 30v 12 14 16 18 v isp ? v isn c/10 threshold (mv) temperature (c) 3922 g37 rising falling dc2247a demo board v led = 30v i led = 333ma ?45 t room = 25c f sw = 2mhz f sw = 400khz v in (v) 4 8 ?20 12 16 20 24 28 32 0 5 10 15 5 20 25 30 35 case temperature rise (c) 3922 g38 n = 359 150c 25c ?40c 30 pwm duty cycle (%) 8.6 9.4 10.2 11.0 11.8 0 50 100 150 55 200 250 300 350 number of units 3922 g39 n = 359 150c 25c ?40c 80 pwm duty cycle (%) 90.2 90.6 91.4 92.2 93.0 93.4 0 50 100 105 150 200 250 300 3922 g40 front page application 6.5v to 18v input voltage transient v led = 30v i led = 333ma 5ms/div
10 for more information www.linear.com/lt3922 p in func t ions sw: switch pins. these pins are internally connected to the power devices and drivers. they should always be tied together. in normal operation, the voltage of these pins will switch between the output voltage and zero at the programmed frequency. do not force any voltage on these pins. bst: boost pin. this pin supplies the top power switch gate driver . connect a 100 nf capacitor between this pin and sw close to the package. an internal diode from intv cc to bst will charge the capacitor when the sw pin switches low. intv cc : internally regulated, low-voltage supply pin. this pin provides the power for the converter switch gate drivers. do not force any voltage on this pin. place a 2.2f bypass capacitor to gnd close to the package. v in : input voltage pin. this pin supplies power to the internal, high-performance analog circuitry. connect a bypass capacitor between this pin and gnd. en/uvlo: enable and undervoltage lockout pin. a volt - age at this pin greater than 1.33v will enable switching, and a voltage less than 0.1 v is guaranteed to shut down the internal current bias and sub-regulators. a resistor network between this pin and ground can be used to set the pin voltage and automatically lockout the part when v in is below a certain level. no internal components pull up or down on this pin, so it requires an external voltage bias for normal operation. this pin may be tied directly to v in . ovlo: input overvoltage lockout pin. when the voltage at this pin rises above 1.205v, the system disables switch - ing and resets the soft-start capacitor. do not leave this pin open. tie this pin to gnd when the ovlo function is not used. v ref : reference voltage pin. this pin provides a buffered 2v reference capable of 3ma drive. it can be used to supply resistor networks for setting the voltages at the ctrl and pwm pins. bypass with a 1f capacitor to gnd. ctrl: control pin. an analog voltage from 250 mv to 1.25v at this pin programs the regulated voltage between isp and isn (and therefore, the regulated current supplied to the load). alternatively, a digital pulse at this pin with duty cycle from 12.5% to 62.5% can be used to program the regulated voltage. below 200mv or 10% duty cycle, the ctrl pin voltage disables switching . for more detail, see typical performance characteristics and applications information sections. isp: positive current sense pin. this pin is one of the inputs to the internal current sense error amplifier. it should be connected to the positive side of the external sense resis - tor. use kelvin connection for accurate current sensing. isn : negative current sense pin. this pin is one of the inputs to the internal current sense error amplifier. it should be connected to the negative side of the external sense resistor. use kelvin connection for accurate cur - rent sensing. v c : compensation pin. a resistor and capacitor connected in series from this pin to gnd stabilize the current and voltage regulation. typical resistor and capacitor values are from 0k to 100k and from 0.1nf to 10nf, respectively. fb: feedback pin. when the voltage at this pin is near 1.2v the regulated current is automatically reduced from the programmed value. a resistor network between this pin and v out can be used to set a limit for the output voltage. if the voltage at the fb pin reaches 1.266v, a fb overvolt - age lockout comparator disables switching. ss : soft-start pin. at startup and recovery from fault conditions, a 20a current charges the capacitor and the fb voltage tracks the rising voltage at this pin until the load current reaches its programmed level. typical values for the capacitor are 10nf to 100nf. using a single resistor from ss to intv cc , the lt3922 can be set in two differ - ent fault modes for the shorted led conditions: hiccup ( no resistor ) and latchoff (100k). refer to the application information section for a detailed explanation. ismon: output current monitoring pin. this pin provides a buffered voltage output equal to 10 mv for every 1mv between isp and isn. lt 3922 3922f
11 for more information www.linear.com/lt3922 p in func t ions fault : fault pin. connect to intv cc through a resistance of 100k. an internal switch pulls this pin low when any of following conditions happen: 1. open led: v fb > 1.14v and (v isp C v isn ) < 10mv 2. shorted led: (v isp C v isn ) > 150mv for more than 300us, or (v isp C v isn ) > 0.7v, or v out < (v in C 2v) rt : timing resistor pin. a resistor from this pin to gnd programs the switching frequency between 200khz and 2mhz. do not leave this pin open. sync/sprd: synchronization pin. to override the pro - grammed switching frequency, drive this pin with an external clock having a frequency between 200 khz and 2mhz. even when using the external clock, select an r t resistor that corresponds to the desired switching fre - quency. tie the pin to intv cc to enable spread spectrum frequency modulation. this pin should be tied to gnd when not in use. rp: pwm resistor pin. connect a resistor from this pin to gnd to set the frequency of the internal pwm signal . do not use a resistor larger than 1m. if using an external pwm pulse for led dimming , tie this pin to gnd. refer to the application information section for a detailed explanation. pwm : pwm input pin. with the rp pin tied to gnd, drive this pin with a digital pulse to control pwm dimming of the leds . alternatively, when using a resistor on the rp pin to gnd, set the voltage of this pin between 1v and 2v to generate an internal pulse with duty cycle between 0% and 100%. when using an analog signal, place a 1f bypass capacitor between this pin and gnd. tie this pin high when pwm dimming is not required. pwmtg: pwm driver output pin . this pin can drive the gate of an external high-side pmos device for pwm dim - ming of leds. do not force any voltage on this pin. v out : output pins. connect to the output and place output capacitors between these pins and gnd as close as pos - sible to the package. refer to the application information section for the recommended capacitor placements . gnd ( pin 22, 23, 25, exposed pad pin 29): ground pins. all gnd pins must be soldered to the board ground plane . nc: no connect pins. these pins can be left open or con - nected to the ground. lt 3922 3922f
12 for more information www.linear.com/lt3922 b lock diagra m 3 28 2 27 1 + ? + + ? + ? ? + internal v cc regulator uvlo and ovlo 2v reference 59.0k 10f v in 2.2f 0.1f 4.7h synchronous controller s r q 1f 356k 1m 5 4 6 7 en/uvlo v in intv cc bst m tsw m bsw 200m sw ovlo v out gnd v ref 17 sync/sprd 8 ctrl ? + + + ? 200khz to 2mhz oscillator 29 22 23 gnd (exposed pad) 24 0.47f 4.7f v out 21 isn 3922 bd 10 isp 9 fb 12 0.47f ? + 16 rt 13 ss 25 26 n/c n/c 11 v c 18 rp 1.4v 1.205v 20a 2a 45.3k 33.2k 1m 2.5k 100k 2.5k s/h s/h v out ? 10v regulator internal pwm signal soft-start and led fault control g m = 140a/v current regulation amplifier v/i converter g m = 1000a/v voltage regulation amplifier peak current comparator 1.25v 0.25v pwmtg driver pwm 19 pwmtg 20 ismon 14 fault intv cc 15 10 ? + + control buffer 25k a/d detector 1nf 10nf 10k lt 3922 3922f
13 for more information www.linear.com/lt3922 o pera t ion the lt3922 is a step-up led driver that utilizes a fixed- frequency peak current control to accurately regulate the current through a string of leds. it includes two power switches, their drivers, and a diode for providing power to the top switch driver . the switches connect an external inductor at the sw pin alternately to the ground and then to the output (v out ). the inductor current rises and falls accordingly and the peak current can be regulated by adjusting the duty ratio of the power switches through the combined effect of the other circuit blocks. the synchronous controller ensures the power switches do not conduct at the same time, and a programmable oscillator turns on the bottom switch at the beginning of each switching cycle. the frequency of this oscillator is set by an external resistor at the rt pin and can be overrid - den by external pulses at the sync/sprd pin. the sync/ sprd pin can also be used to command spread spectrum frequency modulation ( ssfm), which reduces radiated and conducted electromagnetic interference (emi). the bottom switch is turned off by the peak current com- parator which waits during the on-time for the increasing inductor current to exceed the target set by the voltage at the v c pin. this target is modified by a signal from the oscillator which stabilizes the inductor current. a network of passive components at the v c pin is necessary to stabilize this regulation loop. the target for the inductor current is derived from the desired led current programmed by the voltage at the ctrl pin. the analog-to-digital detector and the control buffer convert either a dc voltage or duty cycle of pulses at the ctrl pin into the input for the current regulation amplifier. the other input to this amplifier comes from the isp and isn pin voltages. an external current sense resistor between these pins should be placed in series with the string of leds such that the voltage across it provides the feedback to regulate the led current . the current regulation amplifier then compares the actual led current to the desired led current and adjusts v c as necessary. the voltage regulation amplifier overrides the current regulation amplifier when the fb pin voltage is higher than an internal 1.2v reference. an external resistor network from the led string to the fb pin provides an indication of the led string voltage and allows the voltage amplifier to prevent overvoltage of the led string. the isp, isn, and fb pin voltages are also monitored to detect fault conditions like open and short circuits , which are then reported by pulling fault pin low. the response to a fault can be selected either to try hiccup restarts or to latchoff by the choice of an external resistor connected to the ss pin. refer to the applications information section for a detailed explanation of fault responses. finally, pulse-width modulation ( pwm ) of the led current is achieved by turning on and off an external pmos switch between the v out and the string of leds. an external pulse at the pwm pin controls the state of the pwm driver or a dc voltage at the pwm pin dictates the duty ratio of an internal pwm pulse , whose frequency is programmed with an external resistor at the rp pin. after each pulse, when the pmos switch opens, the lt3922 preserves the voltages of the capacitors at v c and v out to ensure a rapid recovery for the next pulse. a pplica t ions i n f or m a t ion the following is a guide to selecting the external com - ponents and configuring the lt 3922 according to the requirements of an application. programming led current with the ctrl pin the primary function of the lt3922 is to regulate the cur - rent in a string of leds. this current should pass through a series current sense resistor . the voltage across this resistor is sensed by the current regulation amplifier through the isp and isn pins and regulated to a level pro - grammed by the ctrl pin. the maximum resistor voltage that can be programmed is 100 mv which corresponds to 1 a through the led string when a 100m current sense resistor is used. to allow for this maximum current , the ctrl pin may be connected directly to the v ref pin which provides lt 3922 3922f
14 for more information www.linear.com/lt3922 a pplica t ions i n f or m a t ion below 250mv, the ctrl pin commands zero led current, and above 1.25v, it commands the maximum. when an independent voltage source is not available , the intermedi - ate ctrl voltages may be derived from the 2v reference at the v ref pin using a resistor network or potentiometer as long as the total current drawn from the v ref pin is less than 1ma. additionally, the lt3922 is capable of interpreting a digital pulse at the ctrl pin. the high level of the pulse must be greater than 1.6v. the low level must be less than 0.4v. the frequency must be greater than 10khz and less than 200khz. then the regulated voltage between isp and isn will vary with the duty ratio of the pulse as shown in figure 2. in this case, the led current is zero for duty cycles less than 12.5% and reaches its maximum above 62.5%. the lt3922 will cease switching if the duty cycle of the ctrl pin pulse is less than 10%, and also for dc ctrl pin voltages less than 200mv. to reduce the led current when the temperature of the leds rises, use resistors with negative temperature coef - ficient (ntc) in the network from v ref to ctrl as shown in figure 3. setting switching frequency with the rt pin the switching frequency of the lt3922 is programmed by a resistor connected between the rt pin and gnd . values of the r t resistor from 45.3k up to 499k program frequencies from 2 mhz down to 200 khz as shown in table 1. higher frequencies allow for smaller external components but increase switching power losses and radiated emi. table 1. r t resistance range switching frequency r t 2.0 mhz 45.3k 1.6 mhz 57.6k 1.2 mhz 78.7k 1.0 mhz 95.3k 400 khz 249k 200 khz 499k figure 1. analog ctrl range figure 2. duty cycle ctrl range figure 3. setting ctrl with ntc resistors an accurate 2v reference. lower current levels can be programmed by dc ctrl voltages between 250 mv and 1.25v as shown in figure 1. 0 0.25v 1.25v 3922 f01 1.5v v ctrl i led 100mv r sns 0.75v v ctrl < 200mv ctrl-off 50mv r sns 0 12.5% 62.5% 3922 f02 75% d ctrl i led 100mv r sns 37.5% d ctrl < 10% ctrl-off 50mv r sns lt3922 ctrl v ref r ctrl1 r ctrl2 r ntc lt3922 3922 f03 ctrl v ref r ctrl1 r ctrl2 r ntc lt 3922 3922f
15 for more information www.linear.com/lt3922 the attenuation varies depending on the chosen switching frequency, the range of frequencies in which interference is measured, and whether a test measures peak, quasi-peak, or average emissions. the results of several other emission measurements are with select typical application circuits . figure 4. typical conducted peak emi of the lt3922 with 2mhz switching frequency a pplica t ions i n f or m a t ion synchronizing switching frequency the switching frequency can also be synchronized to an external clock connected to the sync/sprd pin. the high-level of the external clock must be at least 1.5v, and the frequency must be between 200khz and 2mhz. the r t resistor is still required in this case, and the resistance should correspond to the frequency of the external clock. if the external clock ever stops, the lt3922 will rely on the r t resistor to set the frequency. enabling spread spectrum frequency modulation connecting sync / sprd to intv cc will enable spread spectrum frequency modulation (ssfm). the switching frequency will vary from the frequency set by the r t resistor to 125% of that frequency. if neither synchronization nor ssfm is required, connect sync/sprd to gnd. as shown in figure 4, enabling ssfm can significantly at - tenuate the electromagnetic interference that the lt3922, like all switching regulators , emits at the switching fre - quency and its harmonics. this feature is designed to help devices that include the lt3922 perform better in the various standard industrial tests related to interference. maximum duty cycle the choice of switching frequency should be made know - ing that the maximum v out voltage of a boost converter is determined by the maximum duty cycle for a given v in voltage as shown in the following equation: v out = v in 1?d ( ) (1) where d is the duty cycle of the boost converter defined as the ratio of the on-time of the bottom power switch to the total switching period. the maximum duty cycle for a given switching frequency is determined by the minimum off-time of the bottom power switch. the typical minimum off-time of the lt3922 is 35ns, so the maximum duty cycle is 93% at 2mhz switching frequency. therefore, if an application requires higher duty cycle, the switching frequency should be set lower to achieve the demanded duty cycle. selecting an inductor the lt3922 limits the inductor peak current to a minimum of 2 a over the duty cycle without sub-harmonic oscillations. this current limit will override the ctrl input command if the programmed led current demands higher inductor peak current than 2a. therefore, it is important to select the inductor value to ensure the peak inductor current is below the limit over the desired input voltage range. the following is an example of inductor value decision process for the application where we want 300ma led current at 30v output, while the input ranges from 8v to 25v and the switching frequency is 2 mhz. the maximum peak inductor current can be derived by adding the half of the inductor current ripple amplitude to the average inductor current value, both values of which are determined by the input and output voltages, switching frequency, efficiency and the inductor values. hence, the minimum inductor value l min that ensures the peak inductor current below 2a is : l min = v in(min) ? v out C v in(min) ( ) 2 ? v out ? f sw ? ? ? ? ? ? ? ? 2 C v out ? i led v in(min) ? efficiency ? ? ? ? ? ? (2) lt 3922 3922f 25 30 ?20 ?10 0 10 20 30 40 50 ssfm on 60 70 80 peak conducted emi (dbv) 3922 f04 ssfm off frequency (mhz) 0 5 10 15 20
16 for more information www.linear.com/lt3922 a pplica t ions i n f or m a t ion using this equation gives an inductance of about 2h as- suming 90% efficiency for the given conditions. with this minimum inductor value guideline , choose an inductor with low core loss and low dc resistance. in - ductor must be able to handle the peak inductor current without saturation . to minimize the radiated noise, use a shielded inductor. the manufacturers featured in table 2 are recommended sources of inductors. table 2. inductor manufacturers manufacturer website wurth electronics www.we-online.com coilcraft www.coilcraft.com vishay intertechnology www.vishay.com selecting an input capacitor the input capacitor supplies the inductor ripple current and the transient current that occurs in pwm dimming operations. a 10f ceramic capacitor should be sufficient to provide these non-steady state currents. place the input capacitor close to the inductor . if possible, place an additional 1 f ceramic capacitor close to the v in pin for better noise immunity. use x7r ceramic capacitors as they typically retain their capacitance better than other capacitor types over wide voltage and temperature ranges. if the input power source has high impedance , or there is significant inductance due to long wires or cables, ad - ditional bulk electrolytic capacitance may be necessary . a low esrlow esr ceramic input capacitor combined with parasitic inductances in the current paths can form a high-q lc tank circuit which can ring the capacitor voltage up to twice the input voltage. a higher esr electrolytic capacitor, on the other hand, minimizes this ringing. refer to the linear technology application note 88 for more information. sources of quality ceramic and electrolytic capacitors are listed in table 3. table 3. capacitor manufacturers manufacturer website murata manufacturing www.murata.com garrett electronics www.garrettelec.com panasonic www.industrial.panasonic.com nippon chemi-con www.chemi-con.co.jp stabilizing the regulation loop the lt3922 uses internal error amplifiers to regulate the led current and the output voltage to the user programmed values. the output impedance of the error amplifiers and the external compensation capacitor, c c , connected to v c pin create the dominant pole of the control loop. the compensation resistor , r c , in series with c c forms a left-half-plane (lhp) zero. this lhp zero allows better regulation of led current and output voltage during tran - sient operations . for most led applications , 1 nf and 10k would be good starting values for c c and r c , respectively. refer to the linear technology application note 76 for more information. selecting and placing output capacitors the output capacitors need to have very low esr to reduce the output ripple. placing several low esr ceramic capaci - tors in parallel is an effective way to reduce esr . these output capacitors in a boost converter should have a ripple current rating greater than the half of the maximum sw pin current . use x7 r ceramic capacitors as they typically retain their capacitance better than other capacitor types over wide voltage and temperature ranges. the lt3922 utilizes a proprietary architecture to reduce emi noise generated by switching. to best utilize this feature, v out should be bypassed with three capacitors. figure 5 shows the v out capacitor placements for the qfn package . c out1 and c out2 are 0402-0.47 f ceramic capacitors placed as close as possible to the lt3922s v out and gnd pins. c out3 should be larger in size and value. a 1206-4.7f ceramic capacitor is recommended for typical applications. lt 3922 3922f
17 for more information www.linear.com/lt3922 a pplica t ions i n f or m a t ion figure 5. placement of output capacitors selecting a mosfet for pwm dimming pulse-width-modulation ( pwm ) dimming of the led cur - rent is an effective way to control the brightness of the light without var ying its color . the brightness can also be adjusted with finer resolution this way than by varying the current level. the lt3922 features a pwmtg driver that is intended for a high-voltage pmos switch in position to effectively pwm dim a string of leds from the output capacitor and the current sense resistor. when the switch is open and the string is disconnected , the led current will be zero. in contrast to a low-side nmos driver, this feature eliminates the need for a dedicated return path for the led current in automotive applications or other grounded chassis systems. the gate driver for this pmos is supplied through the v out pin. when the pwm pin voltage is greater than 1.4v, the driver will pull the gate of the pmos to a maximum of 10v below the v out pin . if v out is below 10v, the gate drive is necessarily reduced . for constant current applications, leave pwmtg open , connect the load directly after the current sense resistor, and connect pwm to intv cc . in these cases, analog dimming may be implemented with the ctrl pin. gnd c out3 1206 c out1 0402 25 24 23 20 21 22 v out v out 3922 f05 v out c out2 0402 the drain source voltage rating of the chosen pmos should be greater than the maximum output voltage. typi - cally the output voltage is a little higher than the sum of the forward voltages of the leds in the string . however, when the string is broken , the output voltage will begin to increase due to the imbalance of inductor current and load current. as described in detail later, the lt3922 will not reduce the inductor current nor limit the output volt - age until the fb pin voltage approaches 1.2v. therefore, the maximum output voltage is ultimately determined by the resistor network between fb and v out . in most applications, the gate source voltage rating of the pmos should be at least 10v. the only exceptions to this rule are applications for which the output voltage is always less than 10v. the pwmtg driver will try to pull the gate of the pmos down to 10v below v out , but it cannot pull the gate below gnd. therefore, when the maximum output voltage is less than 10v, the pmos gate source voltage rating will be sufficient if it is merely equal to or greater than the output voltage. finally, the drain current rating of the pmos must exceed the programmed led current . assuming this condition and the conditions above are met, the only electrical parameter to be considered is the on-resistance. other parameters such as gate charge are less important because pwm dim - ming frequencies are typically too low for efficiency to be affected noticeably by gate charging loss or transition loss. t able 4 lists recommended manufacturers of pmos devices. table 4. pmos manufacturers manufacturer website infineon www.infineon.com vishay intertechnology www.vishay.com fairchild semiconductor corp. www.fairchildsemi.com nxp semiconductors www.nxp.com selecting an rp resistor for internal pwm dimming if the rp pin is tied to gnd , an external pulse-width modulated signal at the pwm pin will control pwm dim - ming of the led load. the signal will enable the pwmtg driver and turn on the external pmos device when it is higher than 1.4v. lt 3922 3922f
18 for more information www.linear.com/lt3922 a pplica t ions i n f or m a t ion however, the lt3922 is capable of pwm dimming even when an external pwm signal is not available . in this case, an internal pwm signal with frequency set by a resistor at the rp pin and duty ratio set by a dc voltage at the pwm pin will control the pwmtg driver . the r p resistor should be one of the seven values listed in table 5. for each of these values , the pwm frequency is a unique ratio of the switching frequency. table 5. internal pwm dimming frequencies r p ratio switching frequency 2mhz 1mhz 200khz 28.7k 2 8 7.81khz 3.91khz 781hz 47.5k 2 9 3.91khz 1.95khz 391hz 76.8k 2 10 1.95khz 977hz 195hz 118k 2 11 977hz 488hz 97.7hz 169k 2 12 488hz 244hz 48.8hz 237k 2 13 244hz 122hz 24.4hz 332k 2 14 122hz 61hz 12.2hz when using the internal pwm signal , set the voltage at the pwm pin between 1 v and 2v. the pwmtg driver will stay off if pwm is below 1v, and it will stay on if pwm is above 2v. between 1 v and 2 v there are 128 evenly spaced thresholds corresponding to 128 discrete pwm duty ratios from 0% to 100%. this range of 1v to 2v has been chosen so that the pwm voltage may be set using a potentiometer or a resistor network and the 2v refer - ence available at the v ref pin . place a small 1 f ceramic capacitor near pwm pin to ground. there are a couple of exceptions to the above rules for pwm dimming . first, once initiated, the pwm on-time will last at least four switching cycles regardless of the signal at the pwm pin and the resistor at the rp pin . this ensures that the current regulation loop has enough time to reach equilibrium but still allows for a 5000:1 dimming ratio when the external pwm frequency is 100hz and the switching frequency is 2mhz. second, to avoid excessive start-up times, after the first pwm pulse, pwmtg will stay on until the ss pin voltage reaches 1.7v or the led current has reached approximately 10% of the full-scale current. figure 7. fb resistor configuration figure 6. ismon filter configuration pwm dimming with very long off times to enhance pwm dimming , the v out and v c pins are driven when the pwm pulse (internal or external) is at a logic low to maintain the charge on the capacitors at those pins. consequently, when pwm returns to a logic high state, the led current can quickly reach the regulated level even if pwm was low for a very long time. monitoring led current the ismon pin provides an amplified and buffered monitor of the voltage between the isp and isn pins. the gain of the internal amplifier is ten, and the speed is fast enough to track the pulse-width modulated led current. however, as shown in figure 6, the ismon voltage can be filtered with a resistor-capacitor network to monitor the average led current instead. the resistor should be at least 10k. the capacitance can be as large or small as needed without affecting the stabil - ity of the internal amplifier. for example, when the pwm frequency is 200hz, a 10 f capacitor combined with the 10k resistor would limit the ripple on ismon to 1%. selecting the fb resistors two resistors should be selected to form a network between the output voltage and the fb pin as shown in figure 7. lt3922 3922 f06 ismon i smon(filtered) r mon c mon lt3922 3922 f07 fb v out r fb2 r fb1 v out(max) = 1.2v ? 1+ r fb2 r fb1 ? ? ? ? ? ? lt 3922 3922f
19 for more information www.linear.com/lt3922 a pplica t ions i n f or m a t ion figure 8. fault resistor configuration this network forms part of a voltage regulation loop when fb is near 1.2v. in this case, the lt3922 will override the programmed led current and adjust the inductor current to lower the output voltage and limit fb to 1.2v. this re - sistor configuration therefore determines the maximum output voltage . in this way , the lt3922 can also be configured as a volt - age regulator instead of an led driver. it will regulate the output voltage near the programmed maximum as long as the load current is less than the current programmed by ctrl. note that this voltage limit may be reached inadvertently if it is set too close to the typical output voltage and the output capacitor is too small. to avoid interference with the current regulation, the feedback resistors should be chosen such that fb is below 1.14v when the leds are conducting. understanding fb overvoltage lockout despite the voltage regulation loop, the fb voltage can temporarily exceed the 1.2v limit. if the output voltage is near the maximum when the led string opens, it may take too long for the feedback loop to adjust the inductor current and avoid overcharging the output . to quickly respond to the overvoltage conditions , the lt3922 will immediately stop switching, disconnect the led string by shutting the external pmos off when the fb pin exceeds the 1.266v fb overvoltage lockout threshold. the fb overvoltage lockout threshold may be routinely exceeded when the lt3922 is being operated as a voltage regulator if the load current decreases rapidly. in this case, the pause in switching limits the output overshoot and ensures that the voltage is back in regulation as quickly as possible. for safe operation, choose r fb1 and r fb2 values to ensure the output voltage is not greater than 40v when the fb voltage is 1.266v. lt3922 3922 f08 fault intv cc r fault open led fault detection and response the resistor network formed by r fb1 and r fb2 also defines the criteria for the open-led fault condition. an open-led fault is detected when the fb pin voltage is greater than 1.14 v and simultaneously the difference between isp and isn pins is less than 10mv. the latter condition ensures that the output current is low (as it should be in an open circuit) not just that output voltage is high as it may be when the leds are conducting a large current. a fault is reported by an internal device pulling the voltage at the fault pin low. there is nothing internal that pulls this voltage high , so an external resistor between intv cc and fault is necessary as shown in figure 8. this con - figuration allows multiple fault pins and similar pins on other parts to be connected and share a single resistor . shorted led fault detection and responses the lt3922 prevents excessive currents that could dam - age the led and the driver by three detection schemes as follows : 1) ( v isp C v isn ) > 150mv for more than 300s, or 2) ( v isp C v isn ) > 700mv, or 3) v out < (v in C 2v) if the lt3922 detects any one of these events, it immedi - ately stops switching, turns off the external pmos pwm switch , pulls down fault pin, and initiates a fault response routine using the ss pin . note that fault pin is held low until the part successfully restarts. lt 3922 3922f
20 for more information www.linear.com/lt3922 a pplica t ions i n f or m a t ion soft-start and fault modes the lt3922 s soft-start (ss) pin has two functions. first, it allows the user to program the output startup voltage ramp rate through the ss pin. an internal 20a current pulls up the ss pin to intv cc . as shown in figure 9, con- necting an external capacitor c ss at the ss pin to gnd will figure 10. fault responses: (a) latchoff and (b) hiccup figure 11. en/uvlo threshold and hysteresis voltages or disable the lt3922. alternatively, resistor networks can be placed from v in to these pins to set the operating range of v in voltage. for instance , the v in undervoltage lockout (uvlo) thresh- old can be accurately set by an external resistor divider. figure 11 illustrates how to set the falling en /uvlo threshold and the rising hysteresis voltages in lt3922. the internal hysteresis is 25mv, but the user can program 3922 f10 time (b) hiccup mode ss pin (v) detected led short fault cleared 1.7v intv cc (3v) 0.2v time (a) latchoff mode ss pin (v) detected led short 1.7v v intvcc (3v) figure 9. ss capacitor and resistor configuration lt3922 3922 f09 ss intv cc r ss (option for latch-off) c ss generate a linear ramp voltage. this voltage ramp at the ss pin forces the lt3922 to regulate the fb pin voltage to track the ss pin voltage until v out is high enough to drive the led at the commanded current level. the ss pin is also used as a fault timer. after a shorted led fault is detected, an internal 2a current pulls down the voltage on the ss pin. the user can configure two different fault response routines by using or not using a pull-up resistor, r ss , from the ss pin to intv cc . figures 10 a and 10 b illustrate corresponding waveforms of the ss pin voltage for the two responses: latchoff and hiccup mode. with a 470k or smaller r ss , the lt3922 will latch off until the user forces a reset by toggling the en /uvlo pin. without the r ss , the lt3922 enters a hiccup mode operation. the 2a pulls ss pin down to 0.2v, at which point the 20a pull-up current turns on again to raise the ss pin voltage. if the fault condition has not been removed until the ss pin reaches 1.7v, the 2 a pull-down current source turns on again to start another cycle . this hiccup mode will continue until the fault is cleared. a typical c ss value is 10nf. programming en/uvlo and ovlo thresholds the lt3922 will stop switching, disable the pwmtg driver , and reset the soft-start when the voltage at the en /uvlo pin drops below 1.33v, or the voltage at the ovlo pin rises above 1.205v. external voltage sources can be used to set the voltage at en/uvlo and ovlo pins to enable lt3922 3922 f11 en/uvlo v in r1 r2 falling threshold v in(uvlo) = 1.33v ? 1+ r1 r2 ? ? ? ? ? ? rising hysteresis v hyst(uvlo) = 25mv ? 1+ r1 r2 ? ? ? ? ? ? +r1 ? 2a lt 3922 3922f
21 for more information www.linear.com/lt3922 a pplica t ions i n f or m a t ion figure 12. ovlo threshold and hysteresis voltages figure 13. en/uvloCovlo threshold and hysteresis voltages additional hysteresis through the external resistor as the en/uvlo pin sinks 2a current when the en/uvlo pin voltage is below the threshold. on the other hand, the v in overvoltage lockout (ovlo) threshold can be accurately set by the external resistor divider as well. figure 12 illustrates how to set the rising ovlo threshold in lt3922. the internal hysteresis of the ovlo pin is 50mv. the exposed pad on the bottom of the package must be soldered to a ground plane. vias placed directly under the package are necessary to dissipate heat. designing the printed circuit board (pcb) the output capacitors c out1 and c out2 of the lt3922 bypass large switched currents from v out to gnd (see figure 5). the loops travelled by these currents should be made small as possible to these pins. these output capacitors, along with the inductor and the input capaci - tors, should be placed on the same side of the pcb, and their connections should be made on that layer . create a kelvin ground network by keeping the ground connection for all of the other components separate . it should only join the ground for the input and output capacitors and the return path for the led current at the exposed pad. there are a few other aspects of the board design that improve performance . an unbroken ground plane on the second layer dissipates heat, but also reduces noise. likewise minimizing the area of the sw and bst nodes reduces noise. the traces for fb and v c should be kept short to lessen the susceptibility to noise of these high- impedance nodes. matched kelvin connections from the external current sense resistor to the isp and isn pins are essential for current regulation accuracy. the 2.2f intv cc and 1f v ref capacitors as well as the 100nf bst capacitor should be placed as closely as possible to their respective pins. use bypass capacitors for the dc input nodes such as v in , ctrl, and pwm ( for internal pwm) to reduce noise. keep the rt and rp nodes small and away from noisy signals. finally, a diode with anode connected to ground and cathode to the drain of the pwmtg mos - fet can protect that device from overvoltage caused by excessive inductance in the led string . please refer to the demo board layout of the lt3922 for more information. both en/uvlo and ovlo can be set precisely using a single resistor string consisting of three series resistors. figure 13 shows the resistor string and the threshold and hysteresis voltages for en/uvlo and ovlo. tie en /uvlo to v in and tie ovlo to gnd if they are not used. do not leave these pins open. planning for thermal shutdown the lt3922 automatically stops switching when the internal temperature is too high. the temperature limit is guaranteed to be higher than the operational temperature of the part. during thermal shutdown, all switching is terminated, ss is forced low , and the leds are disconnected through the pwmtg driver. lt3922 3922 f12 ovlo v in r3 r4 rising threshold v in(ovlo) = 1.205v ? 1+ r3 r4 ? ? ? ? ? ? falling hysteresis v hyst(ovlo) = 50mv ? 1+ r3 r4 ? ? ? ? ? ? v in(uvlo) = 1.33v ? 1+ r5 r6+r7 ? ? ? ? ? ? v hyst(uvlo) = 25mv ? 1+ r5 r6+r7 ? ? ? ? ? ? +r5 ? 2a v in(ovlo) = 1.205v ? 1+ r5+r6 r7 ? ? ? ? ? ? v hyst(ovlo) = 50mv ? 1+ r5+r6 r7 ? ? ? ? ? ? lt3922 3922 f13 en/uvlo v in r5 r6 ovlo r7 lt 3922 3922f
22 for more information www.linear.com/lt3922 typical a pplica t ions 333ma boost led driver using external pwm and strobe 5000:1 external pwm dimming 100s strobe/1s period 100:1 external pwm dimming 100s strobe/100s period 500ns/div i led 100ma/div v pwm 2v/div 3922 ta02b infinite persistence v in = 18v f pwm = 100hz 20s/div i led 100ma/div v pwm 2v/div 3922 ta02c infinite persistence v in = 18v f pwm = 100hz 20s/div i led 100ma/div v pwm 2v/div 3922 ta02d infinite persistence v in = 18v f pwm = 1hz 20s/div i led 100ma/div v pwm 2v/div 3922 ta02e infinite persistence v in = 18v f pwm = 0.01hz v in v in 8v to 27v 365k 59.0k en/uvlo ovlo v ref pwm ctrl sync/sprd intv cc fault bstsw v out v out fb rp v c rt isp gnd gnd isn pwmtg ismon 3922 ta02a lt3922 1m 1m 33.2k 100k 51k 1nf 1f 0.1f l1 2.2h m1 300m 10f 0.47f 0.47f 30v 333ma led ss 45.3k 2mhz 10nf 2.2f l1: wurth 74437324022 m1: vishay si2319cds 4.7f lt 3922 3922f
23 for more information www.linear.com/lt3922 typical a pplica t ions 333ma boost led driver using internal pwm and analog ctrl dimming 128:1 internal pwm dimming 128:1 internal pwm with 20:1 analog ctrl dimming 10:1 internal pwm dimming 10:1 internal pwm with 20:1 analog ctrl dimming 10s/div i led 100ma/div 3922 ta03b v ctrl = 2v v in = 12v f pwm = 122hz 200s/div i led 100ma/div 3922 ta03c v ctrl = 2v v in = 12v f pwm = 122hz 10s/div i led 10ma/div 3922 ta03d v ctrl = 0.3v v in = 12v f pwm = 122hz 200s/div i led 10ma/div 3922 ta03e v ctrl = 0.3v v in = 12v f pwm = 122hz v in v in 8v to 27v 365k 59.0k en/uvlo ovlo v ref pwm ctrl v ctrl sync/sprd intv cc fault bstsw v out v out fb rp v c rt isp gnd gnd isn pwmtg ismon 3922 ta03a lt3922 1m 1m 33.2k 100k 97.6k 100k 10k 1nf 1f 0.1f (option) 0.1f l1 4.7h m1 300m 4.7f 0.47f 0.47f 30v 333ma led ss 45.3k 2mhz 332k 122hz 10nf 2.2f l1: wurth 74437324047 m1: vishay si2319cds 4.7f lt 3922 3922f
24 for more information www.linear.com/lt3922 typical a pplica t ions 333ma boost led driver using external pwm dimming and ssfm 122hz 10:1 external pwm dimming with and without ssfm 2ms/div i led (ssfm) 200ma/div i led (no ssfm) 200ma/div 3922 ta04b v in v in 8v to 27v 4.7f 365k 59.0k en/uvlo ovlo v ref pwm ctrl sync/sprd ssfm intv cc fault bstsw v out v out fb rp v c rt isp gnd gnd isn pwmtg ismon 3922 ta04a lt3922 1m 1m 33.2k 100k 10k 1nf 1f 0.1f l1 4.7h m1 300m 4.7f 0.47f 0.47f 30v 333ma led ss 45.3k 2mhz 10nf 2.2f l1: wurth 74437324047 m1: vishay si2319cds lt 3922 3922f
25 for more information www.linear.com/lt3922 typical a pplica t ions low emi 400khz, 96% efficient 10w (30v, 333ma) boost led driver with ssfm efficiency vs v in peak radiated emi performance (cispr25) average radiated emi performance (cispr25) v in v in 8v to 27v 4.7f 365k 59.0k en/uvlo ovlo v ref pwm pwm dim analog dim ctrl sync/sprd intv cc fault bstsw v out v out fb rp v c rt isp gnd gnd isn pwmtg ismon 3922 ta05a lt3922 100k 1m 1m 33.2k 100k 10k 10f 0.1f 0402 33f 1nf 1f 0.1f l1 22h m1 300m 4.7f 2.2f 0.47f 0.47f fb2 output emi filter input emi filter fb1 30v 333ma led ss 249k 400khz 10nf 2.2f l1: coilcraft xal5050-223meb m1: vishay si2319cds fb1: wurth 742792040 fb2: wurth 742792097 d1: nxp pmeg4010cej 0402 0.1f d1 lt 3922 3922f 12 14 16 18 20 22 24 26 28 80 v led = 30v 85 90 95 100 efficiency (%) 3922 ta05b class 5 peak limit lt3922 400khz f sw peak emi frequency (mhz) 0 f sw = 400khz 100 200 300 400 500 600 700 800 900 1000 without emi filters ?15 ?10 ?5 0 5 10 15 20 25 30 with emi filters 35 40 45 50 amplitude (dbv/m) 3922 ta05c class 5 average limit lt3922 400khz f sw average emi frequency (mhz) 0 v in (v) 100 200 300 400 500 600 700 800 900 1000 6 ?15 ?10 ?5 0 5 10 15 20 25 30 8 35 40 45 50 amplitude (dbv/m) 3922 ta05d 10
26 for more information www.linear.com/lt3922 typical a pplica t ions 500ma boost led driver using pulse duty cycle ctrl input v ctrl duty cycle stepped from 15% to 75% v ctrl duty cycle stepped from 75% to 15% 1ms/div i led 200ma/div v ctrl 2v/div 3922 ta06b 1ms/div i led 200ma/div v ctrl 2v/div 3922 ta06c v in v in 8v to 20v 4.7f 348k 84.5k en/uvlo ovlo v ref ctrl pwm sync/sprd 3v, 10khz pulse intv cc fault bstsw v out v out fb rp v c rt isp gnd gnd isn pwmtg ismon 3922 ta06a lt3922 1m 1m 33.2k 100k 10k 1nf 1f 0.1f l1 6.8h m1 200m 4.7f 0.47f 0.47f 24v 500ma led ss 45.3k 2mhz 10nf 2.2f l1: wurth 74437324068 m1: vishay si2319cds lt 3922 3922f
27 for more information www.linear.com/lt3922 efficiency vs v in typical a pplica t ions 2mhz, 95% efficient 15w (15v, 1a) buck mode led driver v in v in 20v to 36v v in 20v to 36v 33f 51.1k 34.8k en/uvlo ovlo sync/sprd intv cc fault bst sw v out v out fb rp v c rt isp gnd gnd isn pwmtg ismon 3922 ta07a lt3922 1m 249k 33.2k 100k 1f 4.7nf 0.1f l1 4.7h m1 100m 22f 0.47f 0.47f 15v 1a led ss 45.3k 2mhz 100nf 2.2f l1: wurth 74437324047 m1: vishay si2319cds q1: zetex fmmt591a 20k 20k q1 v ref pwm pwm dim analog dim ctrl 100k 1f lt 3922 3922f 36 40 70 75 80 85 90 95 100 efficiency (%) v 3922 ta07b in (v) 16 20 24 28 32
28 for more information www.linear.com/lt3922 typical a pplica t ions efficiency short-led robust boost led driver 500ma, 5v to 12v boost converter with accurate input current limit shorted led protection without r ss : hiccup mode shorted led protection with r ss : latchoff mode 20ms/div i led 1a/div v pwmtg 20v/div v ss 2v/div v faultb 2v/div 3922 ta09b 100ms/div i led 1a/div v pwmtg 20v/div v ss 2v/div v faultb 2v/div 3922 ta09c v in v in 5v 2.2f 84.5k 182k en/uvlo ovlo intv cc fault bstsw v out v out fb rp v c rt isn gnd gnd isp pwmtg ismon 3922 ta08a lt3922 604k 549k 60.4k 100k 10k 1nf 0.1f l1 4.7h 10f v out 12v 500ma 0.47f 0.47f ss 45.3k 2mhz 10nf 2.2f 56m l1: wurth 744316470 sync/sprd v ref pwm pwm dim analog dim ctrl 100k 1f v in v in 8v to 18v 4.7f 226k 80.6k en/uvlo ovlo intv cc fault bstsw v out v out fb rp v c rt isp gnd gnd isn pwmtg ismon 3922 ta09a lt3922 1m 1m 33.2k 100k 10k 1nf 0.1f l1 4.7h m1 d1 200m 4.7f 0.47f 0.47f 21v 500ma led ss 45.3k 2mhz r ss 100k optional 332k 122hz 10nf 2.2f l1: wurth 74437324047 m1: vishay si2319cds d1: nxp pmeg4010cej sync/sprd v ref pwm pwm dim analog dim ctrl 100k 1f lt 3922 3922f 65 70 75 80 85 90 95 100 efficiency (%) 3922 ta08b i load (ma) 0 100 200 300 400 500 60
29 for more information www.linear.com/lt3922 information furnished by linear technology corporation is believed to be accurate and reliable . however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights . p ackage descrip t ion please refer to http://www .linear.com/product/lt3922#packaging for the most recent package drawings. 4.00 0.10 (2 sides) 2.50 ref 5.00 0.10 (2 sides) note: 1. drawing proposed to be made a jedec package outline mo-220 variation (wxxx-x). 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 27 28 1 2 bottom view?exposed pad 3.50 ref 0.75 0.05 r = 0.115 typ r = 0.05 typ pin 1 notch r = 0.20 or 0.35 45 chamfer 0.25 0.05 0.50 bsc 0.200 ref 0.00 ? 0.05 (ufd28) qfn 0506 rev b recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.70 0.05 0.25 0.05 0.50 bsc 2.50 ref 3.50 ref 4.10 0.05 5.50 0.05 2.65 0.05 3.10 0.05 4.50 0.05 package outline 2.65 0.10 3.65 0.10 3.65 0.05 ufd package 28-lead plastic qfn (4mm 5mm) (reference ltc dwg # 05-08-1712 rev b) lt 3922 3922f
30 for more information www.linear.com/lt3922 ? linear technology corporation 2016 lt 0816 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/lt3922 r ela t e d p ar t s typical a pplica t ion part number description comments lt3952 60v, 4 a led driver with 4000:1 pwm dimming with spread spectrum v in : 3 v to 42v, v out(max) = 60v, 4000:1 pwm , 20:1 analog, i sd < 1a, tssop-28e package lt 3518 2.3a, 2.5mhz high current led driver with 3000:1 dimming with pmos disconnect fet driver v in : 3 v to 30 v, v out( max) = 45 v, 3000:1 pwm dimming, i sd < 1 a, 4mm 4mm qfn-16 and tssop-16e packages lt 3755 / lt3755- 1/ lt3755-2 40v in , 75v out , 1 mhz non-synchronous boost led controller v in : 4.5 v to 40v, v out : v in to 75v, 4% current accuracy , 3mm 3mm qfn-16 and mse-16 lt 3761 60v in , 80v out , 1 mhz non-synchronous boost led controller with internal pwm generator v in : 4.5 v to 60v, v out : v in to 80v, 3% current accuracy, external and internal pwm dimming, mse-16 lt3763 60v, 1mhz synchronous buck led controller v in : 6v to 60v, v out : 0v to v in C2v, 6% current accuracy, tssop-28 lt3744 36 v, 1 mhz synchronous buck led controller with four-state control v in : 3.3 v to 36v, v out : 0 v to 36v, 2% current accuracy, fast four-state current control, 5mm 6mm qfn-36 lt 3795 110v, 1mhz non-synchronous boost led controller with spread spectrum frequency modulation v in : 4.5v to 110 v, v out : v in to 110 v, 3% current accuracy, internal spread spectrum, tssop-28 lt 8391 60v, 650khz synchronous 4-switch buck-boost led controller with spread spectrum v in : 4 v to 60v, v out : 0 v to 60v, 3% current accuracy, external and internal pwm dimming, spread spectrum, tssop-28 and 4mm 5mm qfn-28 low emi 2mhz, 333ma boost led driver with ssfm peak radiated emi performance (cispr25) average radiated emi performance (cispr25) v in v in 8v to 27v 4.7f 365k 59.0k en/uvlo ovlo intv cc fault bstsw v out v out fb rp v c rt isp gnd gnd isn pwmtg ismon 3922 ta10a lt3922 1m 1m 33.2k 24k 0.1f 0402 33f 0.22nf 0402 0.1f 0.1f l1 4.7h m1 d1 300m 2.2f 0.47f 0.47f fb2 output emi filter fb1 input emi filter 30v 333ma led ss 45.3k 2mhz 332k 122hz 100nf 2.2f l1: wurth 74437324047 m1: vishay si2319cds fb1: wurth 7427920415 fb2: wurth 742792097 d1: nxp pmeg4010 cej sync/sprd v ref pwm pwm dim analog dim ctrl 100k 1f 100k 2.2f lt 3922 3922f 500 600 700 800 900 1000 ?15 ?10 ?5 0 class 5 peak limit 5 10 15 20 25 30 35 40 45 50 lt3922 2mhz f sw peak emi amplitude (dbv/m) 3922 ta10b class 5 average limit lt3922 2mhz f sw average emi frequency (mhz) 0 100 200 300 400 frequency (mhz) 500 600 700 800 900 1000 ?15 ?10 ?5 0 0 5 10 15 20 25 30 35 40 45 50 100 amplitude (dbv/m) 3922 ta10c 200 300 400

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